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? 2005-2016 microchip technology inc. ds00002252a-page 1 irda controller ? irda v1.1 fir and sir compliant controller, with 9.6k, 19.2k, 38.4k, 57.6k, 115.2k, 0.576mbps, 1.152mpbs and 4mbps data rate support. flash media controller ? complete system solution for interfacing smart- media ? (sm) or xd picture card ? (xd) 1 , memory stick ? (ms), high speed memory stick (hsms), memory stick pro (mspro), ms duo ? , secure digital (sd), high speed sd, mini-secure digital (mini-sd), transflash (sd), multimediacard ? (mmc), reduced size multimedia card (rs- mmc), nand flash, compact flash ? (cf) and cf ultra ? i & ii, and cf form-factor ata hard drives to hi-speed usb - supports usb bulk only mass storage com- pliant bootable bios ? support for simultaneous operation of all above devices. (only one at a time of each of the follow- ing groups supported: cf or ata drive, sm or xd or nand, sd or mmc) ? on-chip 4-bit high speed memory stick and ms pro hardware circuitry ? on-chip firmware reads and writes high speed memory stick and ms pro ? 1-bit ecc correction performed in hardware for maximum efficiency ? hardware support for sd security command extensions ? on-chip power fets with short circuit protection for supplying flash media card power ? usb bus power certified ? 3.3 volt i/o with 5v input tolerance on vbus/ gpio3 ? complete usb specification 2.0 compatibility for bus powered operation - includes hi-speed usb transceiver - a bi-directional control and two bi-directional bulk endpoints are provided. ? 8051 8 bit microprocessor - provides low speed control functions - 30 mhz execution speed at 1 clock per instruction cycle average - 12k bytes of internal sram for general pur- pose scratchpad - 768 bytes of internal sram for general pur- pose scratchpad or program execution while re-flashing external rom - two, double buffered bulk endpoints - two, bi-directional 512 byte buffers for bulk endpoints - 64 byte rx control endpoint buffer - 64 byte tx control endpoint buffer ? internal or external program memory interface - 76k byte internal code space or optional 128k byte external code space using flash, sram or eprom memory. ? on board 24mhz crystal driver circuit ? can be clocked by 48mhz external source ? on-chip 1.8v regulator for low power core operation ? internal pll for 480mhz hi-speed usb sampling, configurable mcu clock ? supports firmware upgrade via usb bus if ?boot block? flash program memory is used ? 12 gpios for special function use: led indica- tors, button inputs, power control to memory devices, etc. - inputs capable of generating interrupts with either edge sensitivity ? attribute bit cont rolled features: - activity led polarity/operation/blink rate - full or partial card compliance checking - bus or self powered - lun configuration and assignment - write protect polarity - smartdetach - detach from usb when no card inserted for notebook apps - cover switch operation for xd compliance - inquiry command operation - sd write protect operation - older cf card support - force usb 1.1 reporting - internal or external power fet operation ? compatible with microsoft winxp, winme, win2k sp3, apple os10, softconnex, and linux multi- lun mass storage class drivers ? win2k, win98/98se and apple os8.6 and os9 multi-lun mass storage class drivers available from microchip ? 128-pin tqfp rohs compliant package (1.0mm height, 14mmx14mm footprint) 1.xd picture card not applicable to usb2229. usb2229/usb2230 5th generation hi-speed usb flash media and irda controller with integrated card power fets
usb2229/usb2230 ds00002252a-page 2 ? 2005-2016 microchip technology inc. to our valued customers it is our intention to provide our valued customers with the bes t documentation possible to ensure successful use of your micro chip products. to this end, we will continue to improve our publications to better suit your needs. our publications will be refined and enhanced as new volumes and updates are introduced. if you have any questions or comments regarding this publication, please contact the marketing co mmunications department via e-mail at docerrors@microchip.com . we welcome your feedback. most current data sheet to obtain the most up-to-date version of this data s heet, please register at our worldwide web site at: http://www.microchip.com you can determine the version of a data s heet by examining its literature number found on the bottom outside corner of any page . the last character of the literature number is the versi on number, (e.g., ds30000000a is version a of document ds30000000). errata an errata sheet, describing minor operati onal differences from the data sheet and recommended workarounds, may exist for cur- rent devices. as device/doc umentation issues become known to us, we will publish an errata s heet. the errata will specify the revision of silicon and revision of document to which it applies. to determine if an errata sheet exis ts for a particular device, please check with one of the following: ? microchip?s worldwide web site; http://www.microchip.com ? your local microchip sales office (see last page) when contacting a sales office, please spec ify which device, revision of silicon and data sheet (include -literature number) yo u are using. customer notification system register on our web site at www.microchip.com to receive the most current information on all of our products.
? 2005-2016 microchip technology inc. ds00002252a-page 3 usb2229/usb2230 table of contents 1.0 general description ....................................................................................................... ................................................................. 4 2.0 pin table ................................................................................................................. ........................................................................ 6 3.0 block diagram ............................................................................................................. .................................................................... 9 4.0 pin configuration ......................................................................................................... ................................................................. 10 5.0 pin descriptions .......................................................................................................... .................................................................. 11 6.0 dc parameters ............................................................................................................. ................................................................ 18 7.0 package information ....................................................................................................... .............................................................. 22 8.0 gpio usage ................................................................................................................ .................................................................. 23 appendix a: data sheet revision history ....................................................................................... .................................................... 24 the microchip web site ........................................................................................................ .............................................................. 25 customer change notification service .......................................................................................... ..................................................... 25 customer support .............................................................................................................. ................................................................. 25 product identification system ................................................................................................. ............................................................ 26
usb2229/usb2230 ds00002252a-page 4 ? 2005-2016 microchip technology inc. 1.0 general description the usb2229/usb2230 is a hi-speed usb irda and bulk only mass storage class peripheral controller. the bulk only mass storage class peripheral controller supports compac tflash (cf) in true ide mode only, smartmedia (sm), memory stick (ms) including both serial and parallel in terface and secure digital/multimediacard (sd/mmc) flash memory devices. it provides a single ch ip solution for the most popular flash memory cards in the market. in addition, the irda controller consists of the microchip ircc blo ck, which includes a synchronous communications engine (sce). the ircc sce supports fir and sir irda. the ircc offers fl exible signal routing and programmable output control through the raw mode interface, general purpose data pins and output multiplexer. chip-level address decoding is required to access the ircc register set. the device consists of a usb2.0 phy and sie, buffers, fast 8051 microprocessor with expanded scratchpad, and pro- gram sram, and irda, cf, ms, sm and sd controllers. the sd controller supports both sd and mmc devices. provisions for external flash memory up to 128k bytes for program storage is provided (n ote: when bank switching is enabled the upper 64k will map into the 8051 rom spac e, otherwise, only the first 64k bytes is used). 12k bytes of scratchpad sram and 768bytes of program sram are also provided. twelve gpio pins are provid ed for indicators, exte rnal serial eeprom for oem id and system confi guration informa- tion, and other special functions. internal power fets are provided to directly su pply power to the xd/sm, mmc/sd and ms/mspro cards. the internal rom program is capable of implementing an y combination of single or multi-lun cf/sd/mmc/sm/ms reader functions with individual card power control and activi ty indication. microchip also provides licenses** for win98 and win2k drivers and setup utilities. note: please check with microchip for prec ise features and capabilities for the current rom code release. 1.1 acronyms sm: smartmedia smc: smartmedia controller fm: flash media fmc: flash media controller cf: compact flash cfc: compactflash controller sd: secure digital sdc: secure digital controller mmc: multimediacard ms : memory stick msc : memory stick controller tpc: transport protocol code. ecc: error checking and correcting crc: cyclic redundancy checking 1.2 reference documents 1. smartmedia ? electrical specification version 1.30 2. smartmedia ? physical format specifications version 1.30 3. smartmedia ? logical format specifications version 1.20 4. smil (smartmedia interface librar y) software edition version 1.00, toshiba corporation, 01, july, 2000 5. smil (smartmedia interface librar y) hardware edition version 1.00, toshiba corporation, 01, july, 2000 6. multimediacard system specification version 2.2 7. sd memory card specifications, part 1, physical layer specification version 1.10, april 2003, sd group 8. sd memory card specifications, part 2, f ile system specification version 1.01, april 15 th , 2001, sd group 9. sd memory card specifications, part 3, security specification version 1.01, april 15 th , 2001, sd group
? 2005-2016 microchip technology inc. ds00002252a-page 5 usb2229/usb2230 10. sd card specification, part e1, secure digital input /output (sdio) card specific ation, version 1.00, october 2001, sd group. 11. memory stick standard excerption from format specification v1.3, july, 2000, sony corporation. 12. memory stick standard format specifications ver 2.0 (memory stick pro). tentative release 0.81, february, 2002 13. compactflash specification rev 1.4 14. cf+ & cf specification rev. ata-5 draft 0.2 15. universal serial bus specification rev 2.0 16. samsung k9k2g08q0m data sheet 17. xd picture card, card specification version 1.10 (jan 31, 2004) 18. xd picture card, format specification version 1.10 (jan 31, 2004) 19. xd picture card, host guideline version 1.10 (jan 31, 2004) 20. xd picture card, compliance guideline version 1.10 (jan 31, 2004)
usb2229/usb2230 ds00002252a-page 6 ? 2005-2016 microchip technology inc. 2.0 pin table 2.1 128-pin package table 2-1: usb2229/usb2230 128-pin package compactflash interface (28 pins) cf_d0 cf_d1 cf_d2 cf_d3 cf_d4 cf_d5 cf_d6 cf_d7 cf_d8 cf_d9 cf_d10 cf_d11 cf_d12 cf_d13 cf_d14 cf_d15 cf_nior cf_niow cf_irq cf_nreset cf_iordy cf_ncs0 cf_ncs1 cf_sa0 cf_sa1 cf_sa2 cf_ncd1 cf_ncd2 smartmedia interface (17 pins) sm_d0 sm_d1 sm_d2 sm_d3 sm_d4 sm_d5 sm_d6 sm_d7 sm_ale sm_cle sm_nre sm_nwe sm_nwp sm_nb/r sm_nce sm_ncd sm_nwps memory stick interface (7 pins) ms_bs ms_sdio/ms_d0 ms_sclk ms_ins ms_d1 ms_d2 ms_d3 sd interface (7 pins) sd_cmd sd_clk sd_dat0 sd_dat1 sd_dat2 sd_dat3 sd_nwp usb interface (10 pins) usbdp usbdm atest rbias vdd18pll vsspll vdda33 vssa xtal1/clkin xtal2 memory/io interface (27 pins) ma0/clk_sel0 ma1/clk_sel1 m a2/sel_clkdrv ma3/tx_pol ma4 ma5 ma6 ma7 ma8 ma9 ma10 ma11 ma12 ma13 ma14 ma15 md0 md1 md2 md3 md4 md5 md6 md7 nmrd nmwr nmce misc (15 pins) gpio1 gpio2 gpio3 gpio4 gpio5 gpio6/romen/ma16 gpio7 gpio8/ crd_pwr0 gpio9 gpio10/ crd_pwr1 gpio11/ crd_pwr2 gpio12 ntest0 ntest1 nreset irda (3 pins) ir_txd/tx ir_rxd/rx ir_mode
? 2005-2016 microchip technology inc. ds00002252a-page 7 usb2229/usb2230 2.2 128-pin list table digital, power, ground & nc (14 pins) (5)vdd33 (2)vdd18 (7)vss total 128 table 2-2: usb2229/usb2230 128-pin tqfp pin # name ma pin # name ma pin # name ma pin # name ma 1 ma13 8 33 cf_d1 8 65 sm_d0 8 97 vss - 2 ma14 8 34 cf_d2 8 66 sm_d1 8 98 rbias - 3 vdd33 - 35 cf_d3 8 67 sm_d2 8 99 atest - 4 ma15 8 36 cf_d4 8 68 sm_d3 8 100 vdd33 - 5 md0 8 37 cf_d5 8 69 sm_d4 8 101 vdd18pll - 6 md1 8 38 cf_d6 8 70 sm_d5 8 102 xtal1/ clkin - 7 md2 8 39 cf_d7 8 71 sm_d6 8 103 xtal2 - 8 md3 8 40 cf_d8 8 72 sm_d7 8 104 vsspll - 9 md4 8 41 cf_d9 8 73 sm_ale 8 105 gpio9 8 10 md5 8 42 gpio8/ crd_pwr0 8 74 sm_nwp 8 106 vdd18 - 11 md6 8 43 vdd33 - 75 sm_cle 8 107 gpio7 8 12 md7 8 44 gpio11/ crd_pwr2 8 76 sm_nwps - 108 vdd33 - 13 nmrd 8 45 cf_d10 8 77 sm_nb/r - 109 gpio6/ romen/ ma16 8 14 nmwr 8 46 cf_d11 8 78 sm_ncd - 110 gpio5 8 15 vss - 47 vss - 79 gpio10/ crd_pwr1 8111 gpio4 8 16 vss - 48 cf_d12 8 80 vdd33 - 112 vss - 17 nmce 8 49 vdd18 - 81 sm_nre 8 113 nreset 8 18 ms_ins - 50 cf_d13 8 82 sm_nwe 8 114 gpio2 8 19 ms_d0/ ms_sdio 8 51 cf_d14 8 83 sm_nce 8 115 gpio1 - 20 ms_d1 8 52 cf_d15 8 84 vss - 116 ma0/ clk_sel0 8 21 ms_d2 8 53 cf_ncd1 - 85 vss - 117 ma1/ clk_sel1 8 22 ms_d3 8 54 cf_ncd2 - 86 vssa - 118 ma2/ sel_ clkdrv 8 23 ms_ sclk 8 55 cf_irq 8 87 usbdm - 119 ma3/ tx_pol 8 24 ms_bs 8 56 cf_iordy 8 88 usbdp - 120 ma4 8 25 sd_nwp - 57 cf_nior 8 89 vdda33 - 121 ma5 8 26 sd_dat0 8 58 cf_niow 8 90 ir_mode 8 122 ma6 8 27 sd_dat1 8 59 cf_nreset 8 91 ir_rxd/rx 8 123 ma7 8 28 sd_dat2 8 60 cf_ncs0 8 92 ir_txd/tx 8 124 ma8 8 table 2-1: usb2229/usb2230 1 28-pin package (continued)
usb2229/usb2230 ds00002252a-page 8 ? 2005-2016 microchip technology inc. 29 sd_dat3 8 61 cf_ncs1 8 93 gpio12 8 125 ma9 8 30 sd_cmd 8 62 cf_sa0 8 94 gpio3 8 126 ma10 8 31 sd_clk - 63 cf_sa1 8 95 ntest1 - 127 ma11 8 32 cf_d0 8 64 cf_sa2 - 9 6 ntest0 - 128 ma12 8 table 2-2: usb2229/usb2230 128-pin tqfp (continued) pin # name ma pin # name ma pin # name ma pin # name ma
usb2229/usb2230 ds00002252a-page 9 ? 2005-2016 microchip technology inc. 3.0 block diagram d a t a b u s s usb 2.0 phy ( transciever ) fast 8051 cpu core 7 pins configuration and control clock generation x t a l sie ( serial interface engine ) program memory/ io bus interrupt controller latch phase 0, 2 sie latch phase 3 8051 latch phase 1 fmc 32 bit osc address x data & sfr address and data busses auto address generators address mux sie control regs address address ep0rx_bc ramrd_a/b ep0tx_bc ramwr_a/b 32 bit 15mhz data bus clockout 24 mhz address register 2.25kb sram 12k byte scratchpad sram #lockedby0hase#lock #lockedby0hase#lock memory cards scratchpad sram (768 byte) f mc data mux ecc control/ status sd controller sd/mmc flash media controllers (fmc) control/ status ms controller ms/hs ms/ms pro control/ status sm controller sm/ssfdc control/ status cf controller cf control/ status crc mem/io bus 29pins data data data data crc ep1tx_bc address address flash media dma unit 76k rom romen irda + 128byte fifo address ramrd_c/d ramwr_c/d address address address ep1rx_bc 64 bytes ep0tx 64 bytes ep0rx 64 bytes ep1tx 64 bytes ep1rx 512 bytes ep2 tx/rx buffer a 512 bytes ep2 tx/rx buffer b 512 bytes ep3 tx/rx buffer a 512 bytes ep3 tx/rx buffer b ir transceiver 60mhz data @ 32 bit 15mhz gpio 12 pins pwr_fet0 pwr_fet1 pwr_fet2 gpio11/crd_pwr2 gpio10/crd_pwr1 gpio8/crd_pwr0
usb2229/usb2230 ds00002252a-page 10 ? 2005-2016 microchip technology inc. 4.0 pin configuration figure 4-1: usb2229/usb2230 128-pin tqfp ma12 ma11 ma10 ma9 ma8 ma7 ma6 ma5 ma4 ma3/tx_pol ma2/sel_clkdrv ma1/clk_sel1 ma0/clk_sel0 gpio1 gpio2 nreset vss gpio4 gpio5 gpio6/romen/ma16 vdd33 gpio7 vdd18 gpio9 vsspll xtal2 xtal1/clkin vdd18pll vdd33 atest rbias vss cf_d1 cf_d2 cf_d3 cf_d4 cf_d5 cf_d6 cf_d7 cf_d8 cf_d9 gpio8/crd_pwr0 vdd33 gpio11/crd_pwr2 cf_d10 cf_d11 vss cf_d12 vdd18 cf_d13 cf_d14 cf_d15 cf_ncd1 cf_ncd2 cf_irq cf_iordy cf_nior cf_niow cf_nreset cf_ncs0 cf_ncs1 cf_sa0 cf_sa1 cf_sa2 usb2230 32 64 96 1 ma13 ma14 vdd33 ma15 md0 md1 md2 md3 md4 md5 md6 md7 nmrd nmwr vss vss nmce ms_ins ms_d0/ms_sdio ms_d1 ms_d2 ms_d3 ms_sclk ms_bs sd_nwp sd_dat0 sd_dat1 sd_dat2 sd_dat3 sd_cmd sd_clk cf_d0 ntest0 ntest1 gpio3 gpio12 ir_txd/tx ir_rxd/rx ir_mode vdda33 usbdp usbdm vssa vss vss sm_nce sm_nwe sm_nre vdd33 gpio10/crd_pwr1 sm_ncd sm_nb/r sm_nwps sm_cle sm_nwp sm_ale sm_d7 sm_d6 sm_d5 sm_d4 sm_d3 sm_d2 sm_d1 sm_d0
? 2005-2016 microchip technology inc. ds00002252a-page 11 usb2229/usb2230 5.0 pin descriptions this section provides a detailed description of each signal. the signals are arranged in functional groups according to their associated interface. the ?n? symbol in the signal name indicates that the active, or asserted state occurs when the signal is at a low voltage level. when ?n? is not present befor e the signal name, the signal is asserted when at the high voltage level. the terms assertion and negation are used exclusively. this is done to avoid confusion when working with a mixture of ?active low? and ?active high? signal. the term assert, or assertion indicates that a signal is active, independent of whether that level is represented by a high or low voltage. the term negate, or negation indicates that a signal is inactive. 5.1 pin descriptions table 5-1: usb2229/usb2230 pin descriptions name symbol buffer type description compactflash (in true ide mode) interface cf chip select 1 cf_ncs1 o8pu this pin is the active low chip select 1 signal for the cf ata device cf chip select 0 cf_ncs0 o8pu this pin is the active low chip select 0 signal for the task file registers of cf ata device in the true ide mode. cf register address 2 cf_sa2 o8 this pin is the register select address bit 2 for the cf ata device. cf register address 1 cf_sa1 o8 this pin is the register select address bit 1 for the cf ata device cf register address 0 cf_sa0 o8 this pin is the register select address bit 0 for the cf ata device. cf interrupt cf_irq ipd this is the active high interrupt request signal from the cf device. cf data 15-8 cf_d[15:8] i/o8pd the bi-directional data signals cf_d15-cf_d8 in true ide mode data transfer. in the true ide mode, all of task file register operation occur on the cf_d[7:0], while the data transfer is on cf_d[15:0]. the bi-directional data signal has an internal weak pull- down resistor. cf data7-0 cf_d[7:0] i/o8pd the bi-directional data signals cf_d7-cf_d0 in the true ide mode data transfer. in the true ide mode, all of task file register operation occur on the cf_d[7:0], while the data transfer is on cf_d[15:0]. the bi-directional data signal has an internal weak pull- down resistor. io ready cf_iordy ipu this pin is active high input signal. this pin has an internally controlled weak pull-up resistor. cf card detection2 cf_ncd2 ipu this card detection pin is connected to the ground on the cf device, when the cf device is inserted. this pin has an internally controlled weak pull-up resistor. cf card detection1 cf_ncd1 ipu this card detection pin is connected to ground on the cf device, when the cf device is inserted. this pin has an internally controlled weak pull-up resistor. cf hardware reset cf_nreset o8 this pin is an active low hardware reset signal to cf device. cf io read cf_nior o8 this pin is an active low read strobe signal for cf device.
usb2229/usb2230 ds00002252a-page 12 ? 2005-2016 microchip technology inc. cf io write strobe cf_niow o8 this pin is an active low write strobe signal for cf device. smartmedia interface sm write protect sm_nwp o8pd this pin is an active low write protect signal for the sm device. this pin has a weak pull-down resistor that is permanently enabled sm address strobe sm_ale o8pd this pin is an active high address latch enable signal for the sm device. this pin has a weak pull-down resistor that is permanently enabled sm command strobe sm_cle o8pd this pin is an active high command latch enable signal for the sm device. this pin has a weak pull-down resistor that is permanently enabled sm data7-0 sm_d[7:0] i/o8pd these pins are the bi-directional data signal sm_d7- sm_d0. the bi-directional data signal has an internal weak pull- down resistor. sm read enable sm_nre 08pu this pin is an active low read strobe signal for sm device. when using the internal fet, this pin has an internal weak pull-up resistor that is tied to the output of the internal power fet. 08 if an external fet is used (internal fet is disabled), then the internal pull-up is not ava ilable (external pull-ups must be used, and should be connected to the applicable card power supply). sm write enable sm_nwe o8pu this pin is an active low write strobe signal for sm device. when using the internal fet, this pin has an internal weak pull-up resistor that is tied to the output of the internal power fet. 08 if an external fet is used (internal fet is disabled), then the internal pull-up is not ava ilable (external pull-ups must be used, and should be connected to the applicable card power supply). sm write protect switch sm_nwps ipu a write-protect seal is detected, when this pin is low. this pin has an internally controlled weak pull-up resistor. sm busy or data ready sm_nb/r i this pin is connected to the bsy/rdy pin of the sm device. an external pull-up resistor is required on this signal. the pull-up resistor must be pulled up to the same power source that powers the sm/nand flash device. sm chip enable sm_nce o8pu this pin is the active low chip enable signal to the sm device. when using the internal fet, this pin has an internal weak pull-up resistor that is tied to the output of the internal power fet. 08 if an external fet is used (internal fet is disabled), then the internal pull-up is not ava ilable (external pull-ups must be used, and should be connected to the applicable card power supply). table 5-1: usb2229/usb2230 pi n descriptions (continued) name symbol buffer type description
? 2005-2016 microchip technology inc. ds00002252a-page 13 usb2229/usb2230 sm card detection sm_ncd ipu this is the card detection signal from sm device to indicate if the device is inserted. this pin has an internally controlled weak pull-up resistor. memory stick interface ms bus state ms_bs o8 this pin is connected to the bs pin of the ms device. it is used to control the bus states 0, 1, 2 and 3 (bs0, bs1, bs2 and bs3) of the ms device. ms system data in/out ms_sdio/ms_d 0 i/o8pd this pin is a bi-directional data signal for the ms device. most significant bit (msb) of ea ch byte is transmitted first by either msc or ms device. the bi-directional data signal has an internal weak pull- down resistor. ms system data in/out ms_d[3:1] i/o8pd this pin is a bi-directional data signal for the ms device. the bi-directional data signals have internal weak pull- down resistors. ms card insertion ms_ins ipu this pin is the card detection signal from the ms device to indicate, if the device is inserted. this pin has an internally controlled weak pull-up resistor. ms system clk ms_sclk o8 this pin is an output clock signal to the ms device. the clock frequency is software configurable. sd interface sd data3-0 sd_dat[3:0] i/o8pu these are bi-directional data signals. these pins have internally controlled weak pull-up resistors. sd clock sd_clk o8 this is an output clock signal to sd/mmc device. the clock frequency is software configurable. sd command sd_cmd i/o8pu this is a bi-directional signal that connects to the cmd signal of sd/mmc device. this pin has an internally controlled weak pull-up resistor. sd write protected sd_nwp ipd this pin is an input signal with an internal weak pull- down. this pin has an internally controlled weak pull-down resistor. usb interface usb bus data usbdm usbdp io-u these pins connect to the usb bus data signals. usb transceiver bias rbias i a 12.0k ? , ? 1.0% resistor is atta ched from vssa to this pin, in order to set the transceiver?s internal bias currents. analog test atest aio this signal is used for testing the analog section of the chip and should be connected to vdda33 for normal operation. 1.8v pll power vdd18pll 1.8v power for the pll pll ground reference vsspll ground reference for 1.8v pll power 3.3v analog power vdda33 3.3v analog power analog ground reference vssa analog ground reference for 3.3v analog power. table 5-1: usb2229/usb2230 pin descriptions (continued) name symbol buffer type description
usb2229/usb2230 ds00002252a-page 14 ? 2005-2016 microchip technology inc. crystal input/external clock input xtal1/ clkin iclkx 24mhz crystal or external 24/48 mhz clock input. this pin can be connected to one terminal of the crystal or can be connected to an external 24/48mhz clock when a crystal is not used. note: the ?ma[2:0] pins will be sampled while nre- set is asserted, and the value will be latched upon nreset negation. this will determine the clock source and value. crystal output xtal2 oclkx 24mhz crystal this is the other terminal of the crystal, or left open when an external clock source is used to drive xtal1/clkin. it may not be used to drive any external circuitry other than the crystal circuit. memory/io interface memory data bus md[7:0] io8 when romen bit of gpio_in1 register = 0, these signals are used to transfer data between the internal cpu and the external program memory. these pins have internally controlled weak pull-up resistors. memory address bus ma[15:3] o8 these signals address memory locations within the external memory. memory address bus ma3/ tx_pol i/o8pu ma3 addresses memory locations within the external memory. during nreset assertion, tx_pol will select the operating polarity of the ir le d (active high or active low) and the weak pull-up resistor will be enabled. when nreset is negated, the value on this pin will be internally latched and this pin will revert to ma3 functionality, the internal pull-up will be disabled. memory address bus ma2/ sel_clkdrv i/o8pd ma2 addresses memory locations within the external memory. sel_clkdrv. during nreset assertion, this pins will select the operating clock mode (crystal or externally driven clock source), and a weak pull-down resistor is enabled. when nreset is negated, the value will be internally latched and this pin will revert to ma2 functionality, the internal pull-down will be disabled. ?0? = crystal operation (24mhz only) ?1? = externally driven clock source (24mhz or 48mhz) note: if the latched value is ?1?, then the ma2 pin is tri-stated when the following conditions are true: 1. idle bit (pcon.0) is 1. 2. int2 is negated 3. sleep bit of clock_sel is 1. if the latched value is ?0?, then the ma2 pin will function identically to the ma[15:3] pi ns at all times (other than during nreset assertion). table 5-1: usb2229/usb2230 pi n descriptions (continued) name symbol buffer type description
? 2005-2016 microchip technology inc. ds00002252a-page 15 usb2229/usb2230 memory address bus ma[1:0]/clk_se l[1:0] i/o8pd ma[1:0], these signals address memory locations within the external memory. sel[1:0]. during nreset assertion, these pins will select the operating frequency of the external clock, and the corresponding weak pull-down resistors are enabled. when nreset is negated, t he value on these pins will be internal latched and these pins will revert to ma[1:0] functionality, the internal pull-downs will be disabled. sel[1:0] = ?00?. 24mhz sel[1:0] = ?01?. reserved sel[1:0] = ?10?. reserved sel[1:0] = ?11?. 48mhz note: if the latched value is ?1?, then the correspond- ing ma pin is tri-stated when the following con- ditions are true: 1. idle bit (pcon.0) is 1. 2. int2 is negated 3. sleep bit of clock_sel is 1. if the latched value is ?0?, then the corresponding ma pin will function identically to t he ma[15:3] pins at all times (other than during nreset assertion). memory write strobe nmwr o8 progra m memory write; active low memory read strobe nmrd o8 program memory read; active low memory chip enable nmce o8 program me mory chip enable; active low. this signal is asserted, when any of the following conditions are no longer met: 1. idle bit (pcon.0) is 1. 2. int2 is negated 3. sleep bit of clock_sel is 1. note: this signal is held to a logic ?high? while nre- set is asserted. misc general purpose i/o gpio1 i/o8 this pin may be used either as input, edge sensitive interrupt input, or output. general purpose i/o gpio2 i/o8 this pin may be used either as input, edge sensitive interrupt input, or output. general purpose i/o gpio3 i/o8 this pin may be used either as input, edge sensitive interrupt input, or output. general purpose i/o gpio4 i/o8 this pin may be used either as input, edge sensitive interrupt input, or output. general purpose i/o gpio5 i/o8 this pin may be used either as input, edge sensitive interrupt input, or output. table 5-1: usb2229/usb2230 pin descriptions (continued) name symbol buffer type description
usb2229/usb2230 ds00002252a-page 16 ? 2005-2016 microchip technology inc. gpio6, romen, memory address 16 gpio6/romen/ ma16 ipu this pin has an internal weak pull-up resistor that is enabled or disa bled by the state of nreset. the pull-up is enabled when nreset is active. the pull-up is disabled, when the nreset is inactive (some clock cycles later, after the rising edge of nreset). the state of this pin is latched internally on the rising edge of nreset to determine if internal or external program memory is used. the state latched is stored in romen bit of gpio_in1 register. i/o8 after the rising edge of nreset, this pin may be used as gpio6 or rxd. when pulled low via an external weak pull-down resistor, an external program memory should be connected to the memory data bus. the usb2229/usb2230 uses this external bus for program execution. when this pin is left unconnected or pulled high by a weak pull-up resistor, the usb2229/usb2230 uses the internal rom for program execution. i/o8 for bank switching support, ma16 addresses the external 128k memory above the standard 64k range (the upper 64k is mapped into the 64k addressable rom space) general purpose i/o gpio7 i/o8 this pin may be used either as input, edge sensitive interrupt input, or output. general purpose i/o or card power gpio8/ crd_pwr0 i/o8 gpio: this pin may be used either as input, edge sensitive interrupt input, or output. crd_pwr: card power drive of 3.3v @ 100ma. general purpose i/o gpio9 i/o8 this pin may be used either as input, edge sensitive interrupt input, or output. general purpose i/o or card power gpio10/ crd_pwr1 i/o8 gpio: this pin may be used either as input, edge sensitive interrupt input, or output. crd_pwr: card power drive of 3.3v @ 100ma. general purpose i/o or card power gpio11/ crd_pwr2 i/o8 gpio: this pin may be used either as input, edge sensitive interrupt input, or output. crd_pwr: card power drive of 3.3v @ 200ma. general purpose i/o gpio12 i/o8 these pins ma y be used either as input, or output. reset input nreset is this active low signal is used by the system to reset the chip. the active low pulse should be at least 1 ? s wide. test input ntest[1:0] i these signals are used for testing the chip. user should normally tie them high externally, if the test function is not used. irda ir mode ir_mode o8 ir_mode, declares t he operating speed of the ir link. ir receive data or uart rx ir_rxd/rx i ir_rxd, can be used as ir receiver or as the uart rx line. ir transmit data or uart tx ir_txd/tx o8 ir_txd, can be used as ir transmitter or as the uart tx line. digital power, grounds, and no connects 1.8v digital core power vdd18 +1.8v core power all vdd18 pins must be connected together on the circuit board. table 5-1: usb2229/usb2230 pi n descriptions (continued) name symbol buffer type description
? 2005-2016 microchip technology inc. ds00002252a-page 17 usb2229/usb2230 note 1: hot-insertion capable card connectors are required for all flash media. it is required for sd connector to have write protect switch. this allows the chip to detect mmc card. 2: nmce is normally asserted except when the 8051 is in standby mode. 5.2 buffer type descriptions 3.3v power & & voltage regulator input vdd33 3.3v power & regulator input. pins 100 & 108 supply 3.3v power to the internal 1.8v regulators. ground vss ground reference table 5-2: usb2229/usb2230 buffer type descriptions buffer description i input ipu input with internal weak pull-up resistor. ipd input with internal weak pull-down resistor. is input with schmitt trigger i/o8 input/output buffer with 8ma sink and 8ma source. i/o8pu input/output buffer with 8ma sink and 8ma source, with an internal weak pull-up resistor. i/o8pd input/output buffer with 8ma sink and 8ma source, with an internal weak pull-down resistor. o8 output buffer with 8ma sink and 8ma source. o8pu output buffer with 8ma sink and 8ma source, with an internal weak pull-up resistor. o8pd output buffer with 8ma sink and 8ma source, with an internal weak pull-down resistor. iclkx xtal clock input oclkx xtal clock output i/o-u analog input/output defined in usb specification aio analog input/output table 5-1: usb2229/usb2230 pin descriptions (continued) name symbol buffer type description
usb2229/usb2230 ds00002252a-page 18 ? 2005-2016 microchip technology inc. 6.0 dc parameters 6.1 maximum ratings operating temperature range.................................................................................................... .................0 o c to +70 o c storage temperature range ...................................................................................................... ............... -55 o to +150 o c lead temperature range (soldering, 10 seconds) ........... ...................................................................... ..............+325 o c positive voltage on gpio3, with respect to ground..... .............. .............. .............. ........... ........... ......... .....................5.5v positive voltage on any signal pin, with respect to gr ound............. .............. .............. .............. .............. ...................4.6v positive voltage on xtal1, with respect to ground..... .............. .............. .............. ........... ........... ......... .....................4.0v positive voltage on xtal2, with respect to ground..... .............. .............. .............. ........... ........... ......... .....................2.5v negative voltage on gpio8, 10 & 11, with respect to ground (see note 6-2 )......................................................... -0.5v negative voltage on any pin, with respect to ground .. .......................................................................... .................. -0.5v maximum v dd18, v dd18pll ............................................................................................................................... .......+2.5v maximum v dd33, v dda33 ............................................................................................................................... ...........+4.6v * stresses above the specified parameters could cause perm anent damage to the device. this is a stress rating only and functional operation of the device at any other condition above those indica ted in the operation sections of this specification is not implied. note 6-1 when powering this device from laboratory or system power supplies, it is im portant that the absolute maximum ratings not be exceeded or device failure can result. some power supplies exhibit voltage spikes on their outputs when the ac power is switched on or off. in addition, voltage transients on the ac power line may appear on the dc output. when this possibility exists, it is suggested that a clamp circuit be used. note 6-2 when internal power fet operation of these pins is enabled, these pins may be simultaneously shorted to ground or any voltage up to 3.63v indef initely, without damage to the device as long as v dd33 and v dda33 are less than 3.63v and t a is less than 70c. 6.2 dc electrical characteristics (ta = 0c - 70c, vdd33, vdda33 = +3.3 v 0.3 v, vdd18, vdd18pll = +1.8 v 10%,) parameter symbol min typ max units comments i,ipu & ipd type input buffer low input level high input level pull down pull up v ili v ihi pd pu 2.0 72 58 0.8 v v ? a ? a ttl levels is type input buffer low input level high input level hysteresis v ili v ihi v hysi 2.0 500 0.8 v v mv ttl levels iclk input buffer low input level high input level v ilck v ihck 2.2 0.4 v v
? 2005-2016 microchip technology inc. ds00002252a-page 19 usb2229/usb2230 input leakage (all i and is buffers) low input leakage high input leakage i il i ih -10 -10 +10 +10 ? a ma v in = 0 v in = v dd33 o8. o8pu & 08pd type buffer low output level high output level output leakage pull down pull up v ol v oh i ol pd pu v dd33 - 0.4 -10 72 58 0.4 +10 v v ? a ? a ? a i ol = 8 ma @ v dd33 = 3.3v i oh = -8ma @ v dd33 = 3.3v v in = 0 to v dd33 ( note 6-3 ) i /o8, i/o8pu & i/o8pd type buffer low output level high output level output leakage pull down pull up v ol v oh i ol pd pu v dd33 ? 0.4 -10 72 58 0.4 +10 v v a a a i ol = 8 ma @ v dd33 = 3.3v i oh = -8 ma @ v dd33 = 3.3v v in = 0 to v dd33 ( note 6-3 ) io-u ( note 6-4 ) parameter symbol min typ max units comments
usb2229/usb2230 ds00002252a-page 20 ? 2005-2016 microchip technology inc. note 6-3 output leakage is measured with th e current pins in high impedance. note 6-4 see appendix a for usb dc electrical characteristics. note 6-5 the maximum power dissipation parameters of the package should not be exceeded. note 6-6 the assignment of each integrated card power fet to a designated card connector is controlled by both firmware and the specific board implementati on. firmware will default to the settings listed in table 8-1, ?gpio usage (rom rev -11),? on page 23 . integrated power fet for gpio8 & gpio10 output current short circuit current limit on resistance output voltage rise time i out i sc r dson t dson 100 140 2.1 800 ma ma ? ? s gpio8 or 10; vdrop fet = 0.23v gpio8 or 10; vout fet = 0v gpio8 or 10; i fet = 70ma gpio8 or 10; c load = 10 ? f integrated power fet for gpio11) output current short circuit current limit on resistance output voltage rise time i out i sc r dson t dson 200 181 2.1 800 ma ma ? ? s gpio11; vdrop fet = 0.46v gpio11; vout fet = 0v gpio11; i fet = 70ma gpio11; c load = 10 ? f supply current unconfigured i ccinit 45 10 60 20 ma ma @ v dd18, v dd18pll = 1.8v @ v dd33, v dda33 = 3.3v supply current active (full speed) i cc 35 15 60 30 ma ma @ v dd18, v dd18pll = 1.8v @ v dd33, v dda33 = 3.3v supply current active (high speed) i cc 45 15 70 30 ma ma @ v dd18, v dd18pll = 1.8v @ v dd33, v dda33 = 3.3v supply current standby i csby 160 215 180 240 a a @ v dd18, v dd18pll = 1.8v @ v dd33, v dda33 = 3.3v parameter symbol min typ max units comments
? 2005-2016 microchip technology inc. ds00002252a-page 21 usb2229/usb2230 6.3 capacitance ta = 25c; fc = 1mhz; vdd18, vdd18pll = 1.8v limits parameter symbol min typ max units test condition clock input capacitance c in 20 pf all pins except usb pins (and pins under test tied to ac ground) input capacitance c in 10 pf output capacitance c out 20 pf
usb2229/usb2230 ds00002252a-page 22 ? 2005-2016 microchip technology inc. 7.0 package information figure 7-1: usb2229/usb2230 128-pin tq fp package, 14x14x1.0mm body, 0.4mm pitch note: for the most current package drawings, see the microchip packaging specification at http://www.microchip.com/packaging
? 2005-2016 microchip technology inc. ds00002252a-page 23 usb2229/usb2230 8.0 gpio usage table 8-1: gpio usage (rom rev -11) name active level symbol description and note gpio1 h flash media activity led/ xd_door indicates media activity. media or usb cable must not be removed with led lit. also may be used for xd door functionality gpio2 h ee_cs serial ee prom chip select gpio3 h v_bus usb v bus detect gpio4 h ee_din/ee_dout/xdid serial ee prom input/output and xd identify gpio5 l hs_ind/sd_cd hs indicato r led or sd card detect switch input gpio6 h a16/romen a16 address line connect for dfu or debug led indicator optional. gpio7 h ee_clk/ unconf_led serial ee prom clock output or unconfigured led. gpio8 l ms_pwr_ctrl/ crd_pwr0 memory stick card power control, or internal power fet0. gpio9 l cf_pwr_ctrl compactflash card power control gpio10 l sm_pwr_ctrl/ crd_pwr1 smartmedia card power control, or internal power fet1. gpio11 l sd/mmc_pwr_ctrl/ crd_pwr2 sd/mmc card power co ntrol, or internal power fet2. gpio12 h ms_act_ind/ media activity memory stick activity indicator, or media activity led.
usb2229/usb2230 ds00002252a-page 24 ? 2005-2016 microchip technology inc. appendix a: data sheet revision history table a-1: revision history revision section/figure/entry correction ds00002252a (07-28-16) replaces previous smsc version rev. 1.4 (09-14-07)
? 2005-2016 microchip technology inc. ds00002252a-page 25 usb2229/usb2230 the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site con- tains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), te chnical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of semi- nars and events, listings of microchip sales offi ces, distributors and factory representatives customer change notification service microchip?s customer notification servic e helps keep customers current on microc hip products. subscribers will receive e-mail notification whenever there are changes, updates, revisi ons or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under ?support?, click on ?customer change notifi- cation? and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this docu- ment. technical support is available through the web site at: http://www.microchip.com/support
usb2229/usb2230 ds00002252a-page 26 ? 2005-2016 microchip technology inc. product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: usb2229, usb2230 temperature range: blank = 0 ? c to +70 ? c package: nu = 128-pin tqfp part no. [x] xxx package temperature range device [x] internal microchip code - - examples: a) USB2229-NU-02 128-pin tqfp rohs compliant package, com- mercial temp, tray b) usb2230-nu-02 128-pin tqfp rohs compliant package, com- mercial temp, tray
? 2005-2016 microchip technology inc. ds00002252a-page 27 usb2229/usb2230 information contained in this publication re garding device applications and the like is provided only for your convenience and may be super- seded by updates. it is your responsibility to ensure that your application meets with your s pecifications. microchip makes no rep- resentations or warranties of any kind whether ex press or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fi tness for purpose . microchip disclaims all liability arising from this information and its use. use of micro- chip devices in life support and/or safety applications is entire ly at the buyer?s risk, and the buyer agrees to defend, indemn ify and hold harmless microchip from any and all damages, cl aims, suits, or expenses resulting from such use. no licens es are conveyed, impl icitly or otherwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, dspic, flashflex, flexpwr, heldo, jukeblox, keeloq, keeloq logo, klee r, lancheck, link md, medialb, most, most logo, mplab, optolyze r, pic, picstart, pic32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered tradem arks of microchip technology incorporat ed in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, any capacitor, anyin, anyout, body com, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit se rial programming, icsp, inter-c hip connectivity, jitterblocker, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem. net, pickit, pictail, puresilicon, righttouc h logo, real ice, ripple blocker, serial quad i/o, sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, vari sense, viewspan, wiperlock, wireless dna, and zena are trademarks of mi crochip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchi p technology incorporated in the u.s.a. silicon storage technology is a regi stered trademark of microchip tech nology inc. in other countries. gestic is a registered trademarks of micr ochip technology germany ii gmbh & co. kg, a subsidiary of microc hip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2005-2016, microchip technology incorporated, pr inted in the u.s.a., all rights reserved. isbn: 9781522408284 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microper ipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem by dnv == iso/ts 16949 ==
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